(a) Field of the Invention
The present invention relates to an apparatus and method for driving a plasma display panel (PDP).
(b) Description of the Related Art
The PDP is a flat panel display that uses plasma generated by gas discharge to display characters or images and includes, according to its size, more than several scores to millions of pixels arranged in a matrix pattern. PDPs may be classified as direct current (DC) type or alternating current (AC) type according to its discharge cell structure and the waveform of the driving voltage applied thereto.
The method for driving the AC PDP generally includes a reset period, an addressing period, a sustain period, and an erase period, in temporal sequence.
The reset period is for initiating the status of each cell so as to facilitate the addressing operation. The addressing period is for selecting cells to be turned on or off and applying an address voltage to the turn-on cells to be timed on (i.e., addressed cells) to accumulate wall charges. The sustain period is for applying sustain pulses and causing a discharge for displaying an image on the addressed cells. The erase period is for reducing the wall charges of the cells to terminate the sustain.
In AC PDPs, the scan electrodes and the sustain electrodes act as a capacitance load, so a capacitance for the scan electrodes and sustain electrodes exists and that capacitance is equivalently represented by a panel capacitor. (Japanese Patent No. 3201603) (hereinafter JP '603) discloses a driver circuit for applying sustain pulses to the panel capacitor.
The driver circuit disclosed in JP '603 alternately applies voltages Vs/2 and −Vs/2 to the Y electrode of the panel capacitor by using a capacitor and a power source for supplying a voltage Vs/2 that is one-half of the voltage Vs necessary for the sustain. More specifically, the driver circuit applies a voltage of Vs/2 to the Y electrode of the panel capacitor through the power source, and charges a voltage Vs/2 in the capacitor. Then, the capacitor is coupled between the ground terminal and the Y electrode of the panel capacitor to apply a voltage −Vs/2 to the Y electrode of the panel capacitor.
In this manner, the positive (+) voltage +Vs/2 and the negative (−) voltage −Vs/2 can be alternately applied to the Y electrode. Likewise, the positive (+) voltage +Vs/2 and the negative (−) voltage −Vs/2 can be alternately applied to the X electrode. The respective voltages ±Vs/2 applied to the X and Y electrodes are phase-inverted with respect to each other, so the voltage Vs/2 necessary for a sustain is applied to both terminals of the panel capacitor.
The driver circuit disclosed in JP '603 can only be used for the plasma display panel using a pulse which swings between −Vs/2 and Vs/2, and the withstand voltage of transistors cannot be sustained at Vs/2 because of the characteristic of the transistors. Moreover, this circuit requires a capacitor with a high capacity for storing a voltage used for the negative (−) voltage and causes a considerable amount of inrush current during the starting due to the capacitor.